Chennai: The Digital India RISC-V (DIR-V) Microprocessor ecosystem is the future of India, Union Minister of State for Skill Development & Entrepreneurship and Electronics & Information Technology, Rajeev Chandrasekhar, asserted today at the Digital India RISC-V (DIR-V) Symposium organised by the Indian Institute of Technology (IIT) Madras in Chennai.
In his virtual address, the Minister emphasized the government’s vision for DIR-V which currently aims to build a robust ecosystem for RISC-V with effective public-private partnerships and collaborations with premiere academic institutions like IIT Madras.
The DI—V program, was launched in April last year with an overall aim to boost India’s semiconductor ecosystem by creating advanced microprocessors and achieving industry-grade silicon and design wins by December 2023. The government expects the DIR-V programme to catalyse design innovation in the country and encourage the several domestic startups working in RISC-V domains like- microarchitecture design, verification and security aspects.
“Today, for India, the Future is Bright, the Future is DIR-V… Innovation, functionality and performance — these are the mantras for the coming years for the DIR-V programme. The Government of India is fully committed to making DIR-V the Indian ISA (Instruction Set Architecture),” he said.
The Minister emphasized the importance of such indigenous programmes and mentioned that there is a growing demand for silicon chips in the ever-increasing digitalisation and for new applications that are yet to be discovered.
“As the internet becomes more complex with the emergence of 5G and 6G, new applications will be discovered. There will be more opportunities for silicon chips, semiconductors and other systems to find a place. When we talk about performance and applications, I see a future where many digital products that we consume today, whether it’s the cloud, data centres, mobile devices, tablets, servers for cloud services, automotive technologies, sensors, IoT, 5G, or 6G networks, we will see DIR V-based chips, devices, and systems in all of these,” he added.
Chandrasekhar explained how it is essential to keep DIR-V at the heart of all India’s goals of high-performance computing. “While we may continue activities and programmes in the x-86 and ARM [Advanced RISC Machine] space, our main focus is on the DIR-V program. I am willing to commit that our High-performance computing goals led by C-DAC and supported by various public-private partnerships, will have DIR-V at the heart of it,” he added.
He also highlighted the importance of going beyond basic functionality and putting more effort into developing cutting-edge systems that set new global standards.
“Our ambition in the India techade spans these three areas: the automotive industrial space with IoT, mobility, and computing, including high-performance computing. Our goal is to make sure that DIR-V has a serious presence in all of these three segments. The real message in addition to saying that we will back this programme is that the expectation from the DIR-V community and the ecosystem is not just anymore about functionality. Today, we don’t just want functional systems, we want functional systems that are also cutting edge in terms of setting new benchmarks against other comparative systems and ISAs,” he said.
The Minister lauded the partnership between IIT Chennai and C-DAC, specifically in the context of the DIR-V programme, highlighting how such collaborations create a hub for creativity and innovation. “The collaboration between IIT Chennai and C-DAC has shown how IIT-Chennai has become a beacon for all other academic institutions around the world, as well as for those interested in being part of this rapidly galloping ecosystem of semiconductors and electronics innovation. IIT Chennai is fast becoming a hub for innovation and creativity, and a hub for future systems centred around DIR-V,” he said.
– global bihari bureau